Computer systems utilize peripheral components to increase functionality during the computing experience. A system on a chip (SoC) provides control for a number of peripheral devices. For example, a display, camera, and multiple media engines, to name a few, are real-time clients that connect as peripheral components to the SoC and enable the input and output of information to and from the computer system. Real-time clients are key components of most computer systems, adding value to a user's daily computing experience. However, many real-time clients are sensitive to excessive latency resulting in user visible effects when the bandwidth and latency demand is not met.
For power saving purposes, SoC interconnects may execute multiple performance and low power states as well as place external memory components in low power states. Additionally, some SoCs enable periodic retraining of memory. These power management and memory retraining events increase time delays, resulting in the memory interface being unavailable for 10 s of microseconds. For some real-time clients, during peak latency periods, these interruptions can result in frame drops, which are apparent to the end user.
SoCs continue to increase in the number of connected real-time clients. The real-time clients compete for bandwidth of shared resources during power management and retraining events. The inability and/or restrictions to successfully manage a system's bandwidth and latency during power management and memory retraining events compromises the quality of service of a computing system.
In the following description, the use of the same reference numerals in different drawings indicates similar or identical items. Unless otherwise noted, the word “coupled” and its associated verb forms include both direct connection and indirect electrical connection by means known in the art, and unless otherwise noted any description of direct connection implies alternate embodiments using suitable forms of indirect electrical connection as well.